LDRD Seminar Series: ‘Leveraging Reconfigurability and Heterogeneity for Next-generation Computing Systems’
Principal Software Development Specialist Kazutomo Yoshii (MCS) will discuss his Laboratory-Directed Research and Development (LDRD) sponsored work at the LDRD Seminar Series presentation Tuesday, Nov. 28, 2017. “Leveraging Reconfigurability and Heterogeneity for Next-generation Computing Systems” begins at 12:30 p.m. in the Building 203 Auditorium. All are welcome to attend.
Since the invention of microprocessors in the early 1970s, the performance evolution of computing systems has been driven by integration improvements in CMOS technology. Unfortunately, CMOS transistor scaling will come to an end within a decade, and no alternative switching technology is expected to be ready for deployment in a timely manner. A radical paradigm shift in computer architecture therefore is needed. Heterogeneity and reconfigurability are keys to improving both performance and energy efficiency. However, they pose significant challenges to programmability and usability because existing programming languages and system software stacks are designed for non-reconfigurable computing architecture or instruction-set architecture.
In this talk, I will first present a summary of high-level synthesis (HLS) technology, in particular OpenCL, for field-programmable gate arrays (FPGAs), one of the most practical reconfigurable architectures today. I will then present performance and energy efficiency results obtained from the current generation of FPGA platforms on numerical simulation, data analytics, and machine learning and deep learning applications; and I will discuss next-generation FPGA platforms. In addition, I will talk about the possibility of integrating HLS FPGA designs into data acquisition systems in order to enable direct computation.
Kazutomo Yoshii is a senior software development specialist in the Mathematics and Computer Science Division at Argonne. He received his M.S. in computer science from the Toyohashi University of Technology in Japan in 1994. After graduation, he joined Hitachi’s research facility in Japan, developing medical imaging analysis software that maps human brain activity captured by functional MRI. In 1998, he joined Turbolinux in Japan as a lead developer and later joined a Turbolinux-sponsored research laboratory in New Mexico, where he worked on the Linux operating system and dynamic provisioning system. He joined Mountain View Data in California in 2002 as director of development and continued to work on the dynamic OS provisioning system.
After a decade of experience in industry, Yoshii joined Argonne in 2004. He was the lead developer of the ZeptoOS project, a U.S. Department of Energy funded research project studying operating systems for petascale architectures with 10,000 to 1 million CPUs. He designed and developed “Big Memory,” an alternative, transparent Linux kernel memory address space that removes the memory performance bottleneck on Blue Gene/P Linux. Yoshii ran scientific applications on his modified Linux kernel on the IBM Blue Gene/P system at Argonne using 32,000 cores. His “Big Memory” implementation also enabled online central processing for the Low-Frequency Array, or LOFAR, radio telescope. In addition, he developed various driver codes and libraries for monitoring and controlling hardware status, including a power-reading code for the Blue Gene/Q for power-aware and thermal-aware projects. As the post-Moore era approaches, he is now exploring heterogeneous, reconfigurable computing architectures such as field-programmable gate arrays for next-generation supercomputers.